[Nasm-bugs] [Bug 3392788] Missing size optimization in mov [ebp + ecx]

noreply-nasm at dev.nasm.us noreply-nasm at dev.nasm.us
Wed Nov 24 04:51:00 PST 2021


negge at dgql.org changed:

           What    |Removed                     |Added
                 CC|                            |negge at dgql.org

--- Comment #1 from negge at dgql.org ---
In the NASM manual it explicitly says that the smaller instruction will be
picked, from https://www.nasm.us/xdoc/2.15/html/nasmdoc3.html#section-3.3

"Some forms of effective address have more than one assembled form; in most
such cases NASM will generate the smallest form it can."

"NASM has a hinting mechanism which will cause [eax+ebx] and [ebx+eax] to
generate different opcodes; this is occasionally useful because [esi+ebp] and
[ebp+esi] have different default segment registers."

Is it possible this was a case that was missed? Could it be added?

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