[Nasm-bugs] [Bug 3392838] New: xchg reg, mem instruction variant in 8086

noreply-nasm at dev.nasm.us noreply-nasm at dev.nasm.us
Wed Mar 15 19:57:59 PDT 2023


            Bug ID: 3392838
           Summary: xchg reg, mem instruction variant in 8086
           Product: NASM
           Version: 2.15.xx
          Hardware: PC
                OS: Linux
            Status: OPEN
          Severity: trivial
          Priority: Medium
         Component: Assembler
          Assignee: nobody at nasm.us
          Reporter: akmubi at yandex.ru
                CC: chang.seok.bae at intel.com, gorcunov at gmail.com,
                    hpa at zytor.com, nasm-bugs at nasm.us
     Obtained from: From OS distribution

According to the Intel 8086 manual
there are only three variants of the xchg instruction (p. 2-67):

xchg acc, reg16
xchg mem, reg
xchg reg, reg.

However, I cannot find any mention of the xchg reg, mem variant anywhere in the
manual. Although this variant is marked as one of the 8086 instructions in the
x86/insns.dat source code. Also I found that it's marked as lockable with the
LOCK prefix but the actual check in asm/assemble.c:1741 triggers a warning if
the first operand is not a memory. Can you please provide some clarification on
this? I may be missing something.

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