[Nasm-bugs] [Bug 3392838] xchg reg, mem instruction variant in 8086

[noreply-nasm at dev.nasm.us]

https://bugzilla.nasm.us/show_bug.cgi?id=3392838

C. Masloch <pushbx at ulukai.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |pushbx at ulukai.org

--- Comment #2 from C. Masloch <pushbx at ulukai.org> ---
Because xchg is symmetric, NASM will "swap" the operands to achieve one of the
possible encodings. In the part from insns.dat that you quoted you can see that
xchg reg16,mem and xchg mem,reg16 have the same opcodes, o16 87 /r with ModR/M.
The memory operand is always the modm part whereas the register is the /r.

The same is true for the (in o16) single-byte xchg acc,reg16 instructions; you
can write either xchg ax,bx or xchg bx,ax and NASM will encode both in the same
way, using a 9Xh opcode.

The warning is indeed wrong. Here's a proper test case. You can also see how
either order gives the same instruction encoding here:

$ nasm -v
NASM version 2.16rc0 compiled on Sep  6 2022
$ cat test.asm
xchg word [0], ax
xchg ax, word [0]
lock xchg word [0], ax
lock xchg ax, word [0]
$ nasm test.asm
test.asm:4: warning: instruction is not lockable [-w+lock]
$ nasm test.asm -l /dev/stderr
     1 00000000 87060000                xchg word [0], ax
     2 00000004 87060000                xchg ax, word [0]
     3 00000008 F087060000              lock xchg word [0], ax
test.asm:4: warning: instruction is not lockable [-w+lock]
     4 0000000D F087060000              lock xchg ax, word [0]
     4          ******************       warning: instruction is not lockable
[-w+lock]
$

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