[nasm:nasm-2.15.xx] BR 2292702: fix ENQCMDS and TILELOADT1 instructions

[nasm-bot for H. Peter Anvin (Intel)]

Commit-ID:  9abbaa133deabdaebf4cbd449b9279e08e314298
Gitweb:     http://repo.or.cz/w/nasm.git?a=commitdiff;h=9abbaa133deabdaebf4cbd449b9279e08e314298
Author:     H. Peter Anvin (Intel) <hpa at zytor.com>
AuthorDate: Mon, 27 Jul 2020 11:44:04 -0700
Committer:  H. Peter Anvin (Intel) <hpa at zytor.com>
CommitDate: Mon, 27 Jul 2020 11:44:04 -0700

BR 2292702: fix ENQCMDS and TILELOADT1 instructions

Wrong prefixes for ENQCMDS and TILELOADT1.

Reported-by:  Iouri Kharon <bc-info at styx.cabel.net>
Signed-off-by: H. Peter Anvin (Intel) <hpa at zytor.com>


---
 x86/insns.dat | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/x86/insns.dat b/x86/insns.dat
index 224e1f34..91b7c595 100644
--- a/x86/insns.dat
+++ b/x86/insns.dat
@@ -6004,10 +6004,10 @@ ENQCMD		reg16,mem512			[rm:	a16 f2 0f 38 f8 /r]			ENQCMD,FUTURE
 ENQCMD		reg32,mem512			[rm:	a16 f2 0f 38 f8 /r]			ENQCMD,FUTURE,ND
 ENQCMD		reg32,mem512			[rm:	a32 f2 0f 38 f8 /r]			ENQCMD,FUTURE
 ENQCMD		reg64,mem512			[rm:	a64 f2 0f 38 f8 /r]			ENQCMD,FUTURE,LONG
-ENQCMDS		reg16,mem512			[rm:	a16 f2 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV
-ENQCMDS		reg32,mem512			[rm:	a16 f2 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV,ND
-ENQCMDS		reg32,mem512			[rm:	a32 f2 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV
-ENQCMDS		reg64,mem512			[rm:	a64 f2 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV,LONG
+ENQCMDS		reg16,mem512			[rm:	a16 f3 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV
+ENQCMDS		reg32,mem512			[rm:	a16 f3 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV,ND
+ENQCMDS		reg32,mem512			[rm:	a32 f3 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV
+ENQCMDS		reg64,mem512			[rm:	a64 f3 0f 38 f8 /r]			ENQCMD,FUTURE,PRIV,LONG
 PCONFIG		void				[	np 0f 01 c5]				PCONFIG,FUTURE,PRIV
 SERIALIZE	void				[	np 0f 01 e8]				SERIALIZE,FUTURE
 WBNOINVD	void				[	f3 0f 09]				WBNOINVD,FUTURE,PRIV
@@ -6039,7 +6039,7 @@ TDPBSUD		tmmreg,tmmreg,tmmreg		[rmv:	vex.128.f3.0f38.w0 5e /r]		AMXINT8,FUTURE,L
 TDPBUSD		tmmreg,tmmreg,tmmreg		[rmv:	vex.128.66.0f38.w0 5e /r]		AMXINT8,FUTURE,LONG
 TDPBUUD		tmmreg,tmmreg,tmmreg		[rmv:	vex.128.np.0f38.w0 5e /r]		AMXINT8,FUTURE,LONG
 TILELOADD	tmmreg,mem			[rm:	vex.128.f2.0f38.w0 4b /r]		AMXTILE,MIB,FUTURE,SX,LONG
-TILELOADDT1	tmmreg,mem			[rm:	vex.128.f2.0f38.w0 4b /r]		AMXTILE,MIB,FUTURE,SX,LONG
+TILELOADDT1	tmmreg,mem			[rm:	vex.128.66.0f38.w0 4b /r]		AMXTILE,MIB,FUTURE,SX,LONG
 TILERELEASE	void				[	vex.128.np.0f38.w0 49 c0]		AMXTILE,FUTURE,LONG
 TILESTORED	mem,tmmreg			[mr:	vex.128.f3.0f38.w0 4b /r]		AMXTILE,MIB,FUTURE,SX,LONG
 TILEZERO	tmmreg				[r:	vex.128.f2.0f38.w0 49 /3r0]		AMXTILE,FUTURE,LONG