[Nasm-commits] [nasm:nasm-2.15.xx] BR 3392674: fix handling of {ud1, ud2b} <reg>, <reg>

[nasm-bot for H. Peter Anvin]

Commit-ID:  7002bb76a3b6c43848dac2e7defcf95c46040517
Gitweb:     http://repo.or.cz/w/nasm.git?a=commitdiff;h=7002bb76a3b6c43848dac2e7defcf95c46040517
Author:     H. Peter Anvin <hpa at zytor.com>
AuthorDate: Mon, 1 Jun 2020 16:03:54 -0700
Committer:  H. Peter Anvin <hpa at zytor.com>
CommitDate: Mon, 1 Jun 2020 16:03:54 -0700

BR 3392674: fix handling of {ud1,ud2b} <reg>,<reg>

We need the instruction table to contain the correct information for
both the reg and the rm field in the various modes.

Reported-by: <fasdfqwer at mail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa at zytor.com>


---
 x86/insns.dat | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/x86/insns.dat b/x86/insns.dat
index c142a61d..e8117241 100644
--- a/x86/insns.dat
+++ b/x86/insns.dat
@@ -1402,14 +1402,14 @@ UD0		void				[	0f ff]					186,OBSOLETE
 UD0		reg16,rm16			[rm:	o16 0f ff /r]				186
 UD0		reg32,rm32			[rm:	o32 0f ff /r]				186
 UD0		reg64,rm64			[rm:	o64 0f ff /r]				186
-UD1		reg,rm16			[rm:	o16 0f b9 /r]				186
-UD1		reg,rm32			[rm:	o32 0f b9 /r]				186
-UD1		reg,rm64			[rm:	o64 0f b9 /r]				186
+UD1		reg16,rm16			[rm:	o16 0f b9 /r]				186
+UD1		reg32,rm32			[rm:	o32 0f b9 /r]				186
+UD1		reg64,rm64			[rm:	o64 0f b9 /r]				186
 UD1		void				[	0f b9]					186,ND
 UD2B		void				[	0f b9]					186,ND
-UD2B		reg,rm16			[rm:	o16 0f b9 /r]				186,ND
-UD2B		reg,rm32			[rm:	o32 0f b9 /r]				186,ND
-UD2B		reg,rm64			[rm:	o64 0f b9 /r]				186,ND
+UD2B		reg16,rm16			[rm:	o16 0f b9 /r]				186,ND
+UD2B		reg32,rm32			[rm:	o32 0f b9 /r]				186,ND
+UD2B		reg64,rm64			[rm:	o64 0f b9 /r]				186,ND
 UD2		void				[	0f 0b]					186
 UD2A		void				[	0f 0b]					186,ND
 UMOV		mem,reg8			[mr:	np 0f 10 /r]				386,UNDOC,SM,ND