[nasm:nasm-2.15.xx] BR 3392681: handle a64 instruction patters correctly

[nasm-bot for H. Peter Anvin (Intel)]

Commit-ID:  d85a6101d731083fa3faae901426e731881f52d4
Gitweb:     http://repo.or.cz/w/nasm.git?a=commitdiff;h=d85a6101d731083fa3faae901426e731881f52d4
Author:     H. Peter Anvin (Intel) <hpa at zytor.com>
AuthorDate: Mon, 22 Jun 2020 13:44:54 -0700
Committer:  H. Peter Anvin (Intel) <hpa at zytor.com>
CommitDate: Mon, 22 Jun 2020 13:52:02 -0700

BR 3392681: handle a64 instruction patters correctly

The a64 instruction patterns would incorrectly force REX to zero at a
point where REX prefixes have already been assigned. This is not only
incorrect in case of instructions which can use high registers, but it
causes an assertion failure. It happened to work for J*CXZ and LOOP*.

Reported-by: Philip Lantz <philip.lantz at intel.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa at zytor.com>


---
 asm/assemble.c |  1 -
 test/a64.asm   | 22 ++++++++++++++++++++++
 x86/insns.dat  |  6 +++---
 3 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/asm/assemble.c b/asm/assemble.c
index 7a0830ca..e5d5682c 100644
--- a/asm/assemble.c
+++ b/asm/assemble.c
@@ -2083,7 +2083,6 @@ static void gencode(struct out_data *data, insn *ins)
             break;
 
         case 0313:
-            ins->rex = 0;
             break;
 
         case4(0314):
diff --git a/test/a64.asm b/test/a64.asm
new file mode 100644
index 00000000..9311624e
--- /dev/null
+++ b/test/a64.asm
@@ -0,0 +1,22 @@
+	bits 64
+start:
+	invlpga eax,ecx
+	invlpga rax,ecx
+	jecxz start
+	jrcxz start
+	loop start,ecx
+	loop start,rcx
+	loope start,ecx
+	loope start,rcx
+	loopz start,ecx
+	loopz start,rcx
+	loopne start,ecx
+	loopne start,rcx
+	loopnz start,ecx
+	loopnz start,rcx
+	clzero eax
+	clzero rax
+	movdir64b eax,[edi]
+	movdir64b rax,[rdi]
+	umonitor eax
+	umonitor rax
diff --git a/x86/insns.dat b/x86/insns.dat
index 61e9c007..a59c5306 100644
--- a/x86/insns.dat
+++ b/x86/insns.dat
@@ -678,7 +678,7 @@ IRETQ		void				[	o64 cf]					X64
 IRETW		void				[	o16 cf]					8086
 JCXZ		imm				[i:	a16 e3 rel8]				8086,NOLONG
 JECXZ		imm				[i:	a32 e3 rel8]				386
-JRCXZ		imm				[i:	a64 e3 rel8]				X64
+JRCXZ		imm				[i:	o64nw a64 e3 rel8]			X64
 JMP		imm|short			[i:	eb rel8]				8086
 JMP		imm				[i:	jmp8 eb rel8]				8086,ND
 JMP		imm				[i:	odf e9 rel]				8086,BND
@@ -5844,13 +5844,13 @@ MOVDIRI		mem32,reg32			[mr:	np 0f 38 f9 /r]				FUTURE,SD
 MOVDIRI		mem64,reg64			[mr:	o64 0f 38 f9 /r]			FUTURE,X64,SQ
 MOVDIR64B	reg16,mem512			[rm:	a16 66 0f 38 f8 /r]			FUTURE,NOLONG
 MOVDIR64B	reg32,mem512			[rm:	a32 66 0f 38 f8 /r]			FUTURE
-MOVDIR64B	reg64,mem512			[rm:	a64 66 0f 38 f8 /r]			FUTURE,X64
+MOVDIR64B	reg64,mem512			[rm:	o64nw a64 66 0f 38 f8 /r]		FUTURE,X64
 PCONFIG		void				[	np 0f 01 c5]				FUTURE
 TPAUSE		reg32				[m:	66 0f ae /6]				FUTURE
 TPAUSE		reg32,reg_edx,reg_eax		[m--:	66 0f ae /6]				FUTURE,ND
 UMONITOR	reg16				[m:	a16 f3 0f ae /6]			FUTURE,NOLONG
 UMONITOR	reg32				[m:	a32 f3 0f ae /6]			FUTURE
-UMONITOR	reg64				[m:	a64 f3 0f ae /6]			FUTURE,X64
+UMONITOR	reg64				[m:	o64nw a64 f3 0f ae /6]			FUTURE,X64
 UMWAIT		reg32				[m:	f2 0f ae /6]				FUTURE
 UMWAIT		reg32,reg_edx,reg_eax		[m--:	f2 0f ae /6]				FUTURE,ND
 WBNOINVD	void				[	f3 0f 09]				FUTURE