[nasm:nasm-2.15.xx] insns.dat: Add Intel Control-Flow Enforcement Technology (CET) instructions

nasm-bot for Henrik Gramner henrik at gramner.com
Sat Jun 27 16:17:14 PDT 2020


Commit-ID:  bca6b26a7ec580f2d99deb3d8c0254f98c09c0a9
Gitweb:     http://repo.or.cz/w/nasm.git?a=commitdiff;h=bca6b26a7ec580f2d99deb3d8c0254f98c09c0a9
Author:     Henrik Gramner <henrik at gramner.com>
AuthorDate: Tue, 16 Jun 2020 01:07:19 +0200
Committer:  H. Peter Anvin (Intel) <hpa at zytor.com>
CommitDate: Sat, 27 Jun 2020 16:12:37 -0700

insns.dat: Add Intel Control-Flow Enforcement Technology (CET) instructions

Add instructions for Intel Control Flow Enforcement Technology (CET).

Signed-off-by: Henrik Gramner <henrik at gramner.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa at zytor.com>


---
 x86/iflags.ph |  1 +
 x86/insns.dat | 16 ++++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/x86/iflags.ph b/x86/iflags.ph
index 8f0a80fd..2c05b293 100644
--- a/x86/iflags.ph
+++ b/x86/iflags.ph
@@ -83,6 +83,7 @@ if_("AVX512VPOPCNTDQ",   "AVX-512 VPOPCNTD/VPOPCNTQ");
 if_("AVX5124FMAPS",      "AVX-512 4-iteration multiply-add");
 if_("AVX5124VNNIW",      "AVX-512 4-iteration dot product");
 if_("SGX",               "Intel Software Guard Extensions (SGX)");
+if_("CET",               "Intel Control-Flow Enforcement Technology (CET)");
 
 # Put these last [hpa: why?]
 if_("OBSOLETE",          "Instruction removed from architecture");
diff --git a/x86/insns.dat b/x86/insns.dat
index a59c5306..980c5943 100644
--- a/x86/insns.dat
+++ b/x86/insns.dat
@@ -5983,6 +5983,22 @@ ENCLS			void					[         np 0f 01 cf]				SGX,FUTURE
 ENCLU			void					[ 	  np 0f 01 d7]				SGX,FUTURE
 ENCLV			void					[	  np 0f 01 c0]				SGX,FUTURE
 
+;# Intel Control-Flow Enforcement Technology (CET)
+CLRSSBSY	mem64				[m:	f3 0f ae /6]				CET,FUTURE
+ENDBR32		void				[	f3 0f 1e fb]				CET,FUTURE
+ENDBR64		void				[	f3 0f 1e fa]				CET,FUTURE
+INCSSPD		reg32				[m:	o32 f3 0f ae /5]			CET,FUTURE
+INCSSPQ		reg64				[m:	o64 f3 0f ae /5]			CET,FUTURE,X64
+RDSSPD		reg32				[m:	o32 f3 0f 1e /1]			CET,FUTURE
+RDSSPQ		reg64				[m:	o64 f3 0f 1e /1]			CET,FUTURE,X64
+RSTORSSP	mem64				[m:	f3 0f 01 /5]				CET,FUTURE
+SAVEPREVSSP	void				[	f3 0f 01 ea]				CET,FUTURE
+SETSSBSY	void				[	f3 0f 01 e8]				CET,FUTURE
+WRUSSD		mem,reg32			[mr:	o32 66 0f 38 f5 /r]			CET,FUTURE
+WRUSSQ		mem,reg64			[mr:	o64 66 0f 38 f5 /r]			CET,FUTURE,X64
+WRSSD		mem,reg32			[mr:	o32 0f 38 f6 /r]			CET,FUTURE
+WRSSQ		mem,reg64			[mr:	o64 0f 38 f6 /r]			CET,FUTURE,X64
+
 ;# Systematic names for the hinting nop instructions
 ; These should be last in the file
 HINT_NOP0	rm16				[m:	o16 0f 18 /0]				P6,UNDOC


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