[nasm:nasm-2.15.xx] x86: sync updated instructions from the master branch

[nasm-bot for H. Peter Anvin]

Commit-ID:  eebdba7d5514b977dca2cde5f430777f330a57f8
Gitweb:     http://repo.or.cz/w/nasm.git?a=commitdiff;h=eebdba7d5514b977dca2cde5f430777f330a57f8
Author:     H. Peter Anvin <hpa at zytor.com>
AuthorDate: Mon, 7 Nov 2022 09:44:16 -0800
Committer:  H. Peter Anvin <hpa at zytor.com>
CommitDate: Mon, 7 Nov 2022 09:45:02 -0800

x86: sync updated instructions from the master branch

Sync updated instructions from the master branch as of 2022-11-06.

Signed-off-by: H. Peter Anvin <hpa at zytor.com>


---
 x86/iflags.ph |  1 +
 x86/insns.dat | 18 ++++++++++++++++--
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/x86/iflags.ph b/x86/iflags.ph
index 7a1e13f5..47ae477e 100644
--- a/x86/iflags.ph
+++ b/x86/iflags.ph
@@ -95,6 +95,7 @@ if_("AVX512VP2INTERSECT", "AVX-512 VP2INTERSECT instructions");
 if_("AMXTILE",           "AMX tile configuration instructions");
 if_("AMXBF16",           "AMX bfloat16 multiplication");
 if_("AMXINT8",           "AMX 8-bit integer multiplication");
+if_("FRED",              "Flexible Return and Exception Delivery (FRED)");
 
 # Put these last [hpa: why?]
 if_("OBSOLETE",          "Instruction removed from architecture");
diff --git a/x86/insns.dat b/x86/insns.dat
index a65180a5..71f626dc 100644
--- a/x86/insns.dat
+++ b/x86/insns.dat
@@ -715,8 +715,9 @@ JMP		rm64				[m:	o64nw ff /4]				X86_64,LONG,BND
 JMPE		imm				[i:	odf 0f b8 rel]				IA64
 JMPE		imm16				[i:	o16 0f b8 rel]				IA64
 JMPE		imm32				[i:	o32 0f b8 rel]				IA64
-JMPE		rm16				[m:	o16 0f 00 /6]				IA64
-JMPE		rm32				[m:	o32 0f 00 /6]				IA64
+JMPE		rm16				[m:	norep o16 0f 00 /6]			IA64
+JMPE		rm32				[m:	norep o32 0f 00 /6]			IA64
+JMPE		rm64				[m:	norep o64 0f 00 /6]			IA64,LONG
 LAHF		void				[	9f]					8086
 LAR		reg16,mem			[rm:	o16 0f 02 /r]				286,PROT,SW
 LAR		reg16,reg16			[rm:	o16 0f 02 /r]				286,PROT
@@ -1900,6 +1901,11 @@ INVEPT		reg32,mem			[rm: 66 0f 38 80 /r]				VMX,SO,NOLONG
 INVEPT		reg64,mem			[rm: o64nw 66 0f 38 80 /r]			VMX,SO,LONG
 INVVPID		reg32,mem			[rm: 66 0f 38 81 /r]				VMX,SO,NOLONG
 INVVPID		reg64,mem			[rm: o64nw 66 0f 38 81 /r]			VMX,SO,LONG
+;# SEV-SNP AMD instructions
+PVALIDATE	void				[       f2 0f 01 ff]				VMX,AMD
+RMPADJUST	void				[       f3 0f 01 fe]				VMX,AMD
+VMGEXIT		void				[       f2 0f 01 c1]				VMX,AMD
+VMGEXIT		void				[       f3 0f 01 c1]				VMX,AMD
 
 ;# Tejas New Instructions (SSSE3)
 PABSB		mmxreg,mmxrm			[rm:	np 0f 38 1c /r]				SSSE3,MMX,SQ
@@ -6055,6 +6061,14 @@ TILERELEASE	void				[	vex.128.np.0f38.w0 49 c0]		AMXTILE,FUTURE,LONG
 TILESTORED	mem,tmmreg			[mr:	vex.128.f3.0f38.w0 4b /r]		AMXTILE,MIB,SIB,FUTURE,SX,LONG
 TILEZERO	tmmreg				[r:	vex.128.f2.0f38.w0 49 /3r0]		AMXTILE,FUTURE,LONG
 
+;# Flexible Return and Exception Delivery (FRED)
+ERETS		void				[	f2 0f 01 ca]				FRED,FUTURE,LONG,PRIV
+ERETU		void				[	f3 0f 01 ca]				FRED,FUTURE,LONG,PRIV
+LKGS		reg16				[m:	f2 0f 00 /6]				FRED,FUTURE,LONG,PRIV
+LKGS		reg32				[m:	f2 0f 00 /6]				FRED,FUTURE,LONG,PRIV,ND
+LKGS		reg64				[m:	f2 0f 00 /6]				FRED,FUTURE,LONG,PRIV,ND
+LKGS		mem				[m:	f2 0f 00 /6]				FRED,FUTURE,LONG,PRIV,SW
+
 ;# Systematic names for the hinting nop instructions
 ; These should be last in the file
 HINT_NOP0	rm16				[m:	o16 0f 18 /0]				P6,UNDOC