[Nasm-devel] AVX512-FP16 instructions

[Agner Fog]

Hi nasm developers

There are 110 new instructions for half-precision floating point 
calculations in the instruction set extension AVX512-FP16:

https://www.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html

These instructions are using a hitherto unused m bit in the EVEX prefix 
to indicate half precision.

I hope that you will add support for these instructions in NASM.

These instructions are supported by Gcc, Clang, and my disassembler ( 
https://www.agner.org/optimize/#objconv )

- Agner